ASIC / FPGA Verification engineer

 

Job # 1087

Job Description:

  • Planning & execution of system and block level verification.
  • Working with multi-disciplinary team to meet quality requirements at system and block level.
  • Working with design & architecture teams to understand
  • functionality of logic blocks.
Requirements :
  • 5 years of experience as an FPGA / ASIC verification engineer
  • Strong verification with SystemVerilog based UVM - A must
  • Strong background in development and deployment of verification methodologies
  • Strong background defining performance & coverage driven
  • verification concepts
  • Residence in northern Israel
 
 
לייבסיטי - בניית אתרים